Truth Tables
A truth table is simply a complete list of every possible input combination for a logic circuit, paired with the output each combination produces. Truth tables are the universal language of digital logic — they describe any combinational circuit unambiguously, regardless of how complex the gate network is. Once you can write and read truth tables, you can predict the behavior of any digital circuit from its schematic without building or simulating it.
Truth tables also work in reverse: given the behavior you want a circuit to have, you can write a truth table first and then derive the logic circuit from it. This design approach — specification first, implementation second — is fundamental to all digital engineering.
A three-input logic circuit alongside its complete 8-row truth table. Every possible input combination A, B, C is listed, and the output Q is determined for each.
View LargerStructure of a Truth Table
A truth table has one column for each input, one or more columns for intermediate signals if helpful, and one column for the output. Each row represents one unique combination of input values. For N inputs, there are always 2N rows (since each input can be 0 or 1, and the combinations multiply).
- 1 input: 2 rows (the NOT gate)
- 2 inputs: 4 rows (AND, OR, NAND, NOR, XOR)
- 3 inputs: 8 rows
- 4 inputs: 16 rows
- 8 inputs: 256 rows
The standard convention for filling in input columns is to treat the inputs as a binary counter. The rightmost input column alternates 0, 1, 0, 1... every row. The next column alternates every 2 rows: 0, 0, 1, 1, 0, 0, 1, 1... The column to the left of that alternates every 4 rows. This systematic ordering guarantees that every combination appears exactly once and makes it easy to verify completeness.
Truth Tables for Single Gates
You already saw the individual gate truth tables in the previous lesson. Here they are together for reference, using the 2-input convention:
| A | B | AND (A·B) | OR (A+B) | NAND | NOR | XOR (A⊕B) | XNOR |
|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |
Multi-Input Truth Tables
When a gate has more than two inputs, the same positional counting method applies. A 3-input AND gate has 8 rows. Its output is 1 only in the last row (when A=1, B=1, C=1); all other rows give 0.
| A | B | C | AND (A·B·C) | OR (A+B+C) |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 |
| 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Truth Tables for Combined Gate Networks
When gates are connected in a network, the truth table is built by working through the circuit from inputs to output, computing each intermediate node's value row by row. Labeling intermediate signals makes the process systematic and error-free.
Label the AND gate output as W = A · B. The final output is Q = W + C.
| A | B | C | W = A·B | Q = W+C |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 1 | 1 |
The output Q is HIGH whenever C is HIGH (regardless of A and B), or when both A and B are HIGH (regardless of C).
Boolean Expressions from Truth Tables: Sum of Products
Given any truth table, you can always write a Boolean expression that produces exactly that output. The standard technique is called the sum of products (SOP) or minterm expansion.
The procedure is:
- Identify every row where the output is 1.
- For each such row, write an AND term (product) that is true for exactly that row: for each input that is 1 in that row, use the input directly; for each input that is 0 in that row, use the NOT of the input.
- OR all those AND terms together.
| A | B | Q |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Output is 1 in rows 1 (A=0, B=0) and 4 (A=1, B=1).
- Row 1: A=0, B=0 → term is Ā · B̄
- Row 4: A=1, B=1 → term is A · B
SOP expression: Q = (Ā · B̄) + (A · B)
This is the XNOR function — the output is 1 when both inputs are the same. ✓
The SOP expression from a truth table is always correct, but it is not always the simplest possible expression. Techniques like Karnaugh maps (K-maps) can simplify SOP expressions by finding groups of adjacent 1s in the truth table that combine into shorter terms. K-map simplification is beyond the scope of this lesson but is worth studying if you plan to design custom digital logic.
De Morgan's Theorems in Practice
De Morgan's theorems (introduced in lesson M18C) are essential for manipulating truth table expressions. They let you convert between AND and OR forms, which is necessary when you want to implement a function using only the available gate types.
Direct implementation requires a NOT gate for Ā and then an AND gate. Instead, apply De Morgan:
Ā · B = Ā · B (double negation, still equal to Ā · B)
But Ā · B is the output of a NAND gate with inputs Ā and B. We still need Ā — but a NAND with both inputs tied together gives NOT. So: use NAND(A,A) to get Ā, then feed Ā and B into another NAND to get Ā · B, then invert with a third NAND(tied) to get Ā · B. Three NAND gates from one 74HC00 quad package.
Don't-Care Conditions
Sometimes certain input combinations can never occur in practice, or the output value for those combinations is irrelevant to the circuit's function. These are called don't-care conditions and are marked with an X in the truth table output column.
Don't-cares are useful in circuit minimization: the designer can freely choose whether each don't-care is treated as a 0 or a 1, whichever leads to a simpler expression. In K-map simplification, don't-cares can be included in groupings if they help form larger groups, which reduces the number of gate terms needed.
A 4-bit BCD digit can only take values 0 through 9 (0000 through 1001). Values 1010 through 1111 (10 through 15) are invalid in BCD. A circuit that checks whether a 4-bit input is a valid BCD digit can treat inputs 1010 through 1111 as don't-cares — those inputs will never appear because the system guarantees valid BCD. This often results in a simpler validity-indicator circuit than if all 16 combinations had to be handled explicitly.
Truth Tables in Radio Circuit Design
Band decoder logic. Many HF transceivers output a 4-bit binary code representing which band is selected (1 = 160m, 2 = 80m, 3 = 40m, etc.). Accessories like antenna tuners and linear amplifiers decode this code to switch band-specific filters and matching networks. The decoder logic is designed from truth tables: for each of the 16 possible 4-bit codes, specify which relay outputs should be active. The resulting Boolean expressions drive the relay drivers. Values above the number of supported bands are don't-care conditions.
Protection logic. A transmit inhibit circuit monitors several conditions: SWR too high (S), temperature too high (T), DC voltage out of range (V). The transmit enable output should be HIGH only when S=0 AND T=0 AND V=0. A truth table for three inputs with one output HIGH only in the first row (all zeros) is the behavior of a 3-input NOR gate — exactly the circuit used in many solid-state PA protection systems.
Digital mode encoders. Custom digital mode hardware (like a PSK31 modulator built from a microcontroller or FPGA) is often described as truth tables during the design phase, then translated into register transfer logic or FPGA lookup tables. Every lookup table in an FPGA is literally a stored truth table in memory — FPGAs implement combinational logic by storing the truth table of the desired function and looking up the output for each input combination.
Frequently Asked Questions
Does a truth table always give the simplest circuit?
No. The SOP expression derived directly from a truth table is correct but is rarely the simplest form. It includes one AND term per 1-output row, which can be many terms for complex functions. Minimization techniques — Karnaugh maps for up to 5 variables, Quine-McCluskey for more — find the fewest gates needed to implement the same truth table. FPGAs use stored lookup tables and never need minimization, but discrete gate designs benefit from it greatly.
How do I handle a circuit with more outputs than one?
Add one output column per output signal. Each output gets its own Boolean expression derived independently from the same input columns. A 7-segment display decoder, for example, has 4 input bits (BCD digit 0–9) and 7 output bits (one per segment). You build seven separate truth tables — or equivalently, seven separate output columns in one 16-row table — and derive seven separate Boolean expressions, one for each segment.
What is the difference between combinational and sequential logic?
Combinational logic (described by truth tables) has outputs that depend only on the current inputs — there is no memory. Sequential logic (flip-flops, counters, state machines) has outputs that depend on current inputs AND previous state. Truth tables fully describe combinational circuits, but sequential circuits require state diagrams and state transition tables as well, because the same inputs can produce different outputs depending on what happened previously.
Test Your Knowledge
Answer the questions below to check your understanding. Every answer can be found in the lesson above.